Microelectronic Circuits

Name: Microelectronic Circuits
Price: 5800 ISK
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Author: Adel S. Sedra; Kenneth C. (KC) Smith; Tony Chan Carusone; Vincent Gaudet
ISBN: 9780197553756

Höfundar: Adel S. Sedra; Kenneth C. (KC) Smith; Tony Chan Carusone; Vincent Gaudet (Útgáfa: 8)

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Microelectronic Circuits eftir Sedra og Smith hefur um árabil verið ein mest notaða kennslubókin í þessu skyldunámskeiði fyrir nemendur í rafmagns- og tölvuverkfræði. „Sedra/Smith“ nýtur virðingar bæði sem kennslubók og uppflettirit og sameinar ítarlega umfjöllun um grundvallaratriði og kynningu á nútímatækni samþættra rása. Bókin hjálpar nemendum að komast frá rásagreiningu yfir í rásahönnun og þjálfa þá hönnunarfærni og innsýn sem er nauðsynleg til að ná árangri á þessu sviði.

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Útgefandi: Oxford University Press Academic US

ISBN: 9780197553756

Print ISBN: 9780190853501

Format: ePub

Útgáfa: 8

Höfundar: Adel S. Sedra; Kenneth C. (KC) Smith; Tony Chan Carusone; Vincent Gaudet

Tungumál: English

Útgefið: 2020-11-16

Prent takmörkun á líftíma: 100

Flokkar: Verkfræði

Efnisflokkar: Tækni og verkfræði › Almennt Tækni og verkfræði › Rafeindatækni

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Cover
Title Page
Copyright Page
Contents In Brief
Contents
Tables
Historical Notes
Preface
Part I: Devices and Basic Circuits
1 Signals, Amplifiers, and Semiconductors
Introduction
1.1 Signals
1.2 Frequency Spectrum of Signals
1.3 Analog and Digital Signals
1.4 Amplifiers
1.4.1 Signal Amplification
1.4.2 Amplifier Circuit Symbol
1.4.3 Voltage Gain
1.4.4 Power Gain and Current Gain
1.4.5 Expressing Gain in Decibels
1.4.6 The Amplifier Power Supplies
1.4.7 Amplifier Saturation
1.4.8 Symbol Convention
1.5 Circuit Models for Amplifiers
1.5.1 Voltage Amplifiers
1.5.2 Cascaded Amplifiers
1.5.3 Other Amplifier Types
1.5.4 Relationships between the Four Amplifier Models
1.5.5 Determining Ri and Ro
1.5.6 Unilateral Models
1.6 Frequency Response of Amplifiers
1.6.1 Measuring the Amplifier Frequency Response
1.6.2 Amplifier Bandwidth
1.6.3 Evaluating the Frequency Response of Amplifiers
1.6.4 Single-Time-Constant Networks
1.6.5 Classification of Amplifiers Based on Frequency Response
1.7 Intrinsic Semiconductors
1.8 Doped Semiconductors
1.9 Current Flow in Semiconductors
1.9.1 Drift Current
1.9.2 Diffusion Current
1.9.3 Relationship between D and μ
1.10 The pn Junction
1.10.1 Physical Structure
1.10.2 Operation with Open-Circuit Terminals
1.11 The pn Junction with an Applied Voltage
1.11.1 Qualitative Description of Junction Operation
1.11.2 The Current–Voltage Relationship of the Junction
1.11.3 Reverse Breakdown
1.12 Capacitive Effects in the pn Junction
1.12.1 Depletion or Junction Capacitance
1.12.2 Diffusion Capacitance
Summary
Problems
2 Operational Amplifiers
Introduction
2.1 The Ideal Op Amp
2.1.1 The Op-Amp Terminals
2.1.2 Function and Characteristics of the Ideal Op Amp
2.1.3 Differential and Common-Mode Signals
2.2 The Inverting Configuration
2.2.1 The Closed-Loop Gain
2.2.2 Effect of Finite Open-Loop Gain
2.2.3 Input and Output Resistances
2.2.4 An Important Application: The Weighted Summer
2.3 The Noninverting Configuration
2.3.1 The Closed-Loop Gain
2.3.2 Effect of Finite Open-Loop Gain
2.3.3 Input and Output Resistance
2.3.4 The Voltage Follower
2.4 Difference Amplifiers
2.4.1 A Single-Op-Amp Difference Amplifier
2.4.2 A Superior Circuit: The Instrumentation Amplifier
2.5 Integrators and Differentiators
2.5.1 The Inverting Configuration with General Impedances
2.5.2 The Inverting Integrator
2.5.3 The Op-Amp Differentiator
2.6 DC Imperfections
2.6.1 Offset Voltage
2.6.2 Input Bias and Offset Currents
2.6.3 Effect of VOS and IOS on the Operation of the Inverting Integrator
2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance
2.7.1 Frequency Dependence of the Open-Loop Gain
2.7.2 Frequency Response of Closed-Loop Amplifiers
2.8 Large-Signal Operation of Op Amps
2.8.1 Output Voltage Saturation
2.8.2 Output Current Limits
2.8.3 Slew Rate
Summary
Problems
3 Diodes
Introduction
3.1 The Ideal Diode
3.1.1 Current–Voltage Characteristic
3.1.2 The Rectifier
3.1.3 Limiting and Protection Circuits
3.2 Terminal Characteristics of Junction Diodes
3.2.1 The Forward-Bias Region
3.2.2 The Reverse-Bias Region
3.2.3 The Breakdown Region
3.3.1 The Exponential Model
3.3 Modeling the Diode
3.3.2 Graphical Analysis Using the Exponential Model
3.3.3 Iterative Analysis Using the Exponential Model
3.3.4 The Need for Rapid Analysis
3.3.5 The Constant-Voltage-Drop Model
3.3.6 The Ideal-Diode Model
3.3.7 Operation in the Reverse Breakdown Region
3.4 The Small-Signal Model
3.5 Voltage Regulation
3.6 Rectifier Circuits
3.6.1 The Half-Wave Rectifier
3.6.2 The Full-Wave Rectifier
3.6.3 The Bridge Rectifier
3.6.4 The Rectifier with a Filter Capacitor—The Peak Rectifier
3.6.5 Precision Half-Wave Rectifier—The Superdiode
3.7 Other Diode Applications
3.7.1 The Clamped Capacitor and Bootstrapping
3.7.2 The Voltage
3.7.3 Varactors
3.7.4 Photodiodes
3.7.5 Light-Emitting Diodes (LEDs)
Summary
Problems
4 Bipolar Junction Transistors (BJTs)
Introduction
4.1 Device Structure and Physical Operation
4.1.1 Simplified Structure and Modes of Operation
4.1.2 Operation of the npn Transistor in the Active Mode
4.1.3 Structure of Actual Transistors
4.1.4 Operation in the Saturation Mode
4.1.5 The pnp Transistor
4.2 Current–Voltage Characteristics
4.2.1 Circuit Symbols and Conventions
4.2.2 Graphical Representation of Transistor Characteristics
4.2.3 Dependence of iC on the Collector Voltage—The Early Effect
4.2.4 An Alternative Form of the Common-Emitter Characteristics
4.3 BJT Circuits at DC
4.4 Transistor Breakdown and Temperature Effects
4.4.1 Transistor Breakdown
4.4.2 Dependence of β on IC and Temperature
Summary
Problems
5 MOS Field-Effect Transistors (MOSFETs)
Introduction
5.1 Device Structure and Physical Operation
5.1.1 Device Structure
5.1.2 Operation with Zero Gate Voltage
5.1.3 Creating a Channel for Current Flow
5.1.4 Applying a Small vDS
5.1.5 Operation as vDS Is Increased
5.1.6 Operation for vDS ≥ vOV: Channel Pinch-Off and Current Saturation
5.1.7 The p-Channel MOSFET
5.1.8 Complementary MOS or CMOS
5.2 Current–Voltage Characteristics
5.2.1 Circuit Symbol
5.2.2 The iD–vDS Characteristics
5.2.3 The iD–vGS Characteristic
5.2.4 Finite Output Resistance in Saturation
5.2.5 Characteristics of the p-Channel MOSFET
5.3 MOSFET Circuits at DC
5.4 Technology Scaling (Moore’s Law) and Other Topics
5.4.1 Technology Scaling
5.4.2 Subthreshold Conduction and Leakage Currents
5.4.3 The Role of the Substrate—The Body Effect
5.4.4 Temperature Effects
5.4.5 Breakdown and Input Protection
5.4.6 The Depletion-Type MOSFET
Summary
Problems
6 Transistor Amplifiers
Introduction
6.1 Basic Principles
6.1.1 The Basis for Amplifier Operation
6.1.2 Obtaining a Voltage Amplifier
6.1.3 The Voltage-Transfer Characteristic (VTC)
6.1.4 Obtaining Linear Amplification by Biasing the Transistor
6.1.5 The Small-Signal Voltage Gain
6.1.6 Determining the VTC by Graphical Analysis
6.1.7 Deciding on a Location for the Bias Point Q
6.2 Small-Signal Operation and Models
6.2.1 The MOSFET Case
6.2.2 The BJT Case
6.2.3 Summary Tables
6.3 Basic Configurations
6.3.1 The Three Basic Configurations
6.3.2 Characterizing Amplifiers
6.3.3 The Common-Source (CS) and Common-Emitter (CE) Amplifiers
6.3.4 The Common-Source (Common-Emitter) Amplifier with a Source (Emitter) Resistance
6.3.5 The Common-Gate (CG) and the Common-Base (CB) Amplifiers
6.3.6 The Source and Emitter Followers
6.3.7 Summary Tables and Comparisons
6.3.8 When and How to Include the Output Resistance ro
6.4 Biasing
6.4.1 The MOSFET Case
6.4.2 The BJT Case
6.5 Discrete-Circuit Amplifiers
6.5.1 A Common-Source (CS) Amplifier
6.5.2 A Common-Emitter Amplifier
6.5.3 A Common-Emitter Amplifier with an Emitter Resistance Re
6.5.4 A Common-Base (CB) Amplifier
6.5.5 An Emitter Follower
6.5.6 The Amplifier Frequency Response
Summary
Problems
Part II: Analog Integrated Circuits
7 Building Blocks of Integrated-Circuit Amplifiers
Introduction
7.1 IC Design Philosophy
7.2 IC Biasing: Current Sources and Current Mirrors
7.2.1 The Basic MOSFET Current Source
7.2.2 The MOS Current Mirror
7.2.3 MOS Current-Steering Circuits
7.2.4 BJT Circuits
7.2.5 Small-Signal Operation of Current Mirrors
7.3 The Basic Gain Cell
7.3.1 The CS and CE Amplifiers with Current-Source Loads
7.3.2 The Intrinsic Gain
7.3.3 Effect of the Output Resistance of the Current-Source Load
7.3.4 Increasing the Gain of the Basic Cell
7.4 The Common-Gate and Common-Base Amplifiers as Current Buffers
7.4.1 The CG Circuit
7.4.2 Output Resistance of a CS Amplifier with a Source Resistance
7.4.3 The Body Effect in the CG Amplifier
7.4.4 The CB Circuit
7.4.5 Output Resistance of the Emitter-Degenerated CE Amplifier
7.5 The Cascode Amplifier
7.5.1 The MOS Cascode Amplifier
7.5.2 Distribution of Voltage Gain in a Cascode Amplifier
7.5.3 The BJT Cascode
7.6 The IC Source Follower
7.7 Current-Mirror Circuits with Improved Performance
7.7.1 The Cascode MOS Mirror
7.7.2 The Wilson BJT Current Mirror
7.7.3 The Wilson MOS Mirror
7.7.4 The Widlar Current Source
Summary
Problems
8 Differential and Multistage Amplifiers
Introduction
8.1 The MOS Differential Pair
8.1.1 Operation with a Common-Mode Input Voltage
8.1.2 Operation with a Differential Input Voltage
8.1.3 Large-Signal Operation
8.1.4 Small-Signal Operation
8.1.5 The Differential Amplifier with Current-Source Loads
8.1.6 Cascode Differential Amplifier
8.2 The BJT Differential Pair
8.2.1 Basic Operation
8.2.2 Input Common-Mode Range
8.2.3 Large-Signal Operation
8.2.4 Small-Signal Operation
8.3 Common-Mode Rejection
8.3.1 The MOS Case
8.3.2 The BJT Case
8.4 DC Offset
8.4.1 Input Offset Voltage of the MOS Differential Amplifier
8.4.2 Input Offset Voltage of the Bipolar Differential Amplifier
8.4.3 Input Bias and Offset Currents of the Bipolar Differential Amplifier
8.4.4 A Concluding Remark
8.5 The Differential Amplifier with a Current-Mirror Load
8.5.1 Differential-to-Single-Ended Conversion
8.5.2 The Current-Mirror-Loaded MOS Differential Pair
8.5.3 Differential Gain of the Current-Mirror-Loaded MOS Pair
8.5.4 The Bipolar Differential Pair with a Current-Mirror Load
8.5.5 Common-Mode Gain and CMRR
8.6 Multistage Amplifiers
8.6.1 A Two-Stage CMOS Op Amp
8.6.2 A Bipolar Op Amp
Summary
Problems
9 Frequency Response
Introduction
9.1 High-Frequency Transistor Models
9.1.1 The MOSFET
9.1.2 The BJT
9.2 High-Frequency Response of CS and CE Amplifiers
9.2.1 Frequency Response of the Low-Pass Single-Time-Constant Circuit
9.2.2 The Common-Source Amplifier
9.2.3 Frequency Response of the CS Amplifier When Rsig Is Low
9.2.4 The Common-Emitter Amplifier
9.2.5 Miller’s Theorem
9.3.1 The High-Frequency Gain Function
9.3.2 Determining the 3-dB Frequency fH
9.3.3 Applying the Method of Open-Circuit Time Constants to the CS Amplifier
9.3.4 Application of the Method of Open-Circuit Time Constants to the CE Amplifier
9.4.1 High-Frequency Response of the CG Amplifier
9.4.2 High-Frequency Response of the MOS Cascode Amplifier
9.4.3 High-Frequency Response of the Bipolar Cascode Amplifier
9.5.1 The Source-Follower Case
9.5.2 The Emitter-Follower Case
9.6 High-Frequency Response of Differential Amplifiers
9.6.1 Analysis of the Resistively Loaded MOS Amplifier
9.6.2 Frequency Response of the Current-Mirror-Loaded MOS Differential Amplifier
9.7 Other Wideband Amplifier Configurations
9.7.1 Obtaining Wideband Amplification by Source or Emitter Degeneration
9.7.2 Increasing fH by Buffering the Input Signal Source
9.7.3 Increasing fH by Eliminating the Miller Effect Using a CG or a CB Configuration with an Input Buffer
9.8 Low-Frequency Response of Discrete-Circuit CS and CE Amplifiers
9.8.1 Frequency Response of the High-Pass Single-Time-Constant Circuit
9.8.2 The CS Amplifier
9.8.3 The Method of Short-Circuit Time Constants
9.8.4 The CE Amplifier
Summary
Problems
10 Feedback
Introduction
10.1 The General Feedback Structure
10.1.1 Signal-Flow Diagram
10.1.2 The Closed-Loop Gain
10.1.3 The Loop Gain
10.1.4 The Ideal Case of Infinite Open-Loop Gain
10.1.5 Summary
10.2 Some Properties of Negative Feedback
10.2.1 Gain Desensitivity
10.2.2 Bandwidth Extension
10.2.3 Reduction in Nonlinear Distortion
10.3 The Feedback Voltage Amplifier
10.3.1 The Series–Shunt Feedback Topology
10.3.2 Examples of Series–Shunt Feedback Amplifiers
10.3.3 Analysis of the Feedback Voltage Amplifier
10.3.4 A Final Remark
10.4 Systematic Analysis of Feedback Voltage Amplifiers
10.4.1 The Ideal Case
10.4.2 The Practical Case
10.5 Other Feedback-Amplifier Types
10.5.1 Basic Principles
10.5.2 The Feedback Transconductance Amplifier (Series–Series)
10.5.3 The Feedback Transresistance Amplifier (Shunt–Shunt)
10.5.4 The Feedback Current Amplifier (Shunt–Series)
10.6 Summary of the Feedback-Analysis Method
10.7 The Stability Problem
10.8 Effect of Feedback on the Amplifier Poles
10.8.1 Stability and Pole Location
10.8.2 Poles of the Feedback Amplifier
10.8.3 Amplifiers with a Single-Pole Response
10.8.4 Amplifiers with a Two-Pole Response
10.8.5 Amplifiers with Three or More Poles
10.9 Stability Study Using Bode Plots
10.9.1 Gain and Phase Margins
10.9.2 Effect of Phase Margin on Closed-Loop Response
10.9.3 An Alternative Approach for Investigating Stability
10.10 Frequency Compensation
10.10.1 Theory
10.10.2 Implementation
10.10.3 Miller Compensation and Pole Splitting
Summary
Problems
11 Output Stages and Power Amplifiers
Introduction
11.1 Classification of Output Stages
11.2 Class A Output Stage
11.2.1 Transfer Characteristic
11.2.2 Signal Waveforms
11.2.3 Power Dissipation
11.2.4 Power-Conversion Efficiency
11.3 Class B Output Stage
11.3.1 Circuit Operation
11.3.2 Transfer Characteristic
11.3.3 Power-Conversion Efficiency
11.3.4 Power Dissipation
11.4 Class AB Output Stage
11.4.1 Circuit Operation
11.4.2 Output Resistance
11.5 Biasing the Class AB Circuit
11.5.1 Biasing Using Diodes
11.5.2 Biasing Using the
11.5.3 Use of Input Emitter Followers
11.5.4 Use of Compound Devices
11.6 CMOS Output Stages
11.6.1 The Source Follower
11.6.2 An Alternative Using a Common-Source Transistor
11.6.3 Class D Power Amplifiers
11.7 Power Transistors
11.7.1 Packages and Heat Sinks
11.7.2 Power BJTs
11.7.3 Power MOSFETs
Summary
Problems
12 Operational-Amplifier Circuits
Introduction
12.1 The Two-Stage CMOS Op Amp
12.1.1 The Circuit
12.1.2 Input Common-Mode Range and Output Swing
12.1.3 DC Voltage Gain
12.1.4 Common-Mode Rejection Ratio (CMRR)
12.1.5 Frequency Response
12.1.6 Slew Rate
12.1.7 Power-Supply Rejection Ratio (PSRR)
12.1.8 Design Trade-Offs
12.2 The Folded-Cascode CMOS OpAmp
12.2.1 The Circuit
12.2.2 Input Common-Mode Range and Output Swing
12.2.3 Voltage Gain
12.2.4 Frequency Response
12.2.5 Slew Rate
12.2.6 Increasing the Input Common-Mode Range: Rail-to-Rail Input Operation
12.2.7 Increasing the Output Voltage Range: The Wide-Swing Current Mirror
12.3 BJT Op-Amp Techniques
12.3.1 Bias Design
12.3.2 Design of the Input Stage
12.3.3 Common-Mode Feedback to Control the DC Voltage at the Output of the Input Stage
12.3.4 The 741 Op Amp Input Stage
12.3.5 Output-Stage Design for Near Rail-to-Rail Output Swing
Summary
Problems
13 Filters and Oscillators
Introduction
13.1 Basic Filter Concepts
13.1.1 Filter Transmission
13.1.2 Filter Types
13.1.3 Filter Specification
13.1.4 Obtaining the Filter Transfer Function: Filter Approximation
13.1.5 Obtaining the Filter Circuit: Filter Realization
13.2 The Filter Transfer Function
13.2.1 The Filter Order
13.2.2 The Filter Poles
13.2.3 The Filter Transmission Zeros
13.2.4 All-Pole Filters
13.2.5 Factoring T(s) into the Product of First-Order and Second-Order Functions
13.2.6 First-Order Filters
13.2.7 Second-Order Filter Functions
13.3 Butterworth and Chebyshev Filters
13.3.1 The Butterworth Filter
13.3.2 The Chebyshev Filter
13.4 Second-Order Passive Filters Based on the LCR Resonator
13.4.1 The Resonator Poles
13.4.2 Realization of Transmission Zeros
13.4.3 Realization of the Low-Pass Function
13.4.4 Realization of the Bandpass Function
13.4.5 Realization of the Notch Functions
13.5 Second-Order Active Filters Based on Inductance Simulation
13.5.1 The Antoniou Inductance-Simulation Circuit
13.5.2 The Op Amp–RC Resonator
13.5.3 Realization of the Various Filter Types
13.6 Second-Order Active Filters Based on the Two-Integrator Loop
13.6.1 Derivation of the Two-Integrator-Loop Biquad
13.6.2 Circuit Implementation
13.6.3 An Alternative Two-Integrator-Loop Biquad Circuit
13.6.4 Final Remarks
13.7 Second Order Active Filters Using a Single Op Amp
13.7.1 Bandpass Circuit
13.7.2 High-Pass Circuit
13.7.3 Low-Pass Circuit
13.8 Switched-Capacitor Filters
13.8.1 The Basic Principle
13.8.2 Switched-Capacitor Integrator
13.8.3 Switched-Capacitor Biquad Filter
13.8.4 Final Remarks
13.9 Basic Principles of Sinusoidal Oscillators
13.9.1 The Oscillator Feedback Loop
13.9.2 The Oscillation Criterion
13.9.3 Analysis of Oscillator Circuits
13.9.4 Nonlinear Amplitude Control
13.10 Op Amp–RC Oscillator Circuits
13.10.1 The Wien-Bridge Oscillator
13.10.2 The Phase-Shift Oscillator
13.10.3 The Quadrature Oscillator
13.10.4 The Active-Filter-Tuned Oscillator
13.10.5 A Final Remark
13.11 LC and Crystal Oscillators
13.11.1 The Colpitts and Hartely Oscillators
13.11.2 The Cross-Coupled LC Oscillator
13.11.3 Crystal Oscillators
13.12 Nonlinear Oscillators or Function Generators
13.12.1 The Bistable Feedback Loop
13.12.2 Transfer Characteristic of the Bistable Circuit
13.12.3 Triggering the Bistable Circuit
13.12.4 The Bistable Circuit as a Memory Element
13.12.5 A Bistable Circuit with Noninverting Transfer Characteristic
13.12.6 Generating Square Waveforms Using a Bistable Circuit
13.12.7 Generating Triangular Waveforms
13.12.8 Generation of Sine Waves
Summary
Problems
Part III: Digital Integrated Circuits
14 CMOS Digital Logic Circuits
Introduction
14.1 CMOS Logic-Gate Circuits
14.1.1 Switch-Level Transistor Model
14.1.2 The CMOS Inverter
14.1.3 General Structure of CMOS Logic
14.1.4 The Two-Input NOR Gate
14.1.5 The Two-Input NAND Gate
14.1.6 A Complex Gate
14.1.7 Obtaining the PUN from the PDN and Vice Versa
14.1.8 The Exclusive-OR Function
14.1.9 Summary of the Synthesis Method
14.2 Digital Logic Inverters
14.2.1 The Voltage-Transfer Characteristic (VTC)
14.2.2 Noise Margins
14.2.3 The Ideal VTC
14.2.4 Inverter Implementation
14.3 The CMOS Inverter
14.3.1 Circuit Operation
14.3.2 The Voltage-Transfer Characteristic (VTC)
14.3.3 The Situation When QN and QP Are Not Matched
Summary
Problems
15 Digital Design: Power, Speed, and Area
Introduction
15.1 Dynamic Operation of the CMOS Inverter
15.1.1 Propagation Delay
15.1.2 Determining the Propagation Delay of the CMOS Inverter
15.1.3 Determining the Equivalent Load Capacitance
15.2 Transistor Sizing
15.2.1 Inverter Sizing
15.2.2 Transistor Sizing in CMOS Logic Gates
15.2.3 Effects of Fan-In and Fan-Out on Propagation Delay
15.2.4 Driving a Large Capacitance
15.3 Power Dissipation
15.3.1 Sources of Power Dissipation
15.3.2 Power–Delay and Energy–Delay Products
15.4 Implications of Technology Scaling: Issues in Deep-Submicron Design
15.4.1 Silicon Area
15.4.2 Scaling Implications
15.4.3 Temperature, Voltage, and Process Variations
15.4.4 Wiring: The Interconnect
15.4.5 Digital Design in Modern Technologies
Summary
Problems
16 Memory and Clocking Circuits
Introduction
16.1 The Transmission Gate
16.1.1 Operation with NMOS Transistors as Switches
16.1.2 Restoring the Value of
16.1.3 The Use of CMOS Transmission Gates as Switches
16.2 Latches and Flip-Flops
16.2.1 The Latch
16.2.2 The SR Flip-Flop
16.2.3 CMOS Implementation of SR Flip-Flops
16.2.4 A Simpler CMOS Implementation of the Clocked SR Flip-Flop
16.2.5 D Flip-Flop Circuits
16.3 Random-Access Memory (RAM) Cells
16.3.1 Static Memory (SRAM) Cell
16.3.2 Dynamic Memory (DRAM) Cell
16.3.3 Flash Memory
16.4 Ring Oscillators and Special-Purpose Circuits
16.4.1 Ring Oscillators and Other Pulse-Generation Circuits
16.4.2 The Sense Amplifier
16.4.3 The Row-Address Decoder
16.4.4The Column-Address Decoder
Summary
Problems
Appendices A–L
A. VLSI Fabrication Technology*
B. SPICE Device Models and Design with Simulation Examples*
C. Two-Port Network Parameters*
D.Some Useful Network Theorems*
E. Single-Time-Constant Circuits*
F. s-Domain Analysis: Poles, Zeros, and Bode Plots*
G.Comparison of the MOSFET and the BJT*
H. Filter Design Material*
I. Bibliography*
L. Answers to Selected Problems*
J. Standard Resistance Values and Unit Prefixes
K. Typical Parameter Values for IC Devices Fabricated in CMOS and Bipolar Processes
Index