Digital Electronics: Principles and Applications ISE

Höfundur: TOKHEIM (Útgáfa: 10)
Digital Electronics: Principles and Applications ISE

Kaup valmöguleikar

Digital Electronics: Principles and Applications is an easy-to-read introductory text for students new to the field of digital electronics. Providing entry-level knowledge and skills for a wide range of occupations is the goal of this textbook and its ancillary materials. Concepts are connected to practical applications, and a systems approach is followed that reflects current practice in industry.

Nánar um bókina

Útgefandi
McGraw-Hill Higher Education (International)
ISBN
9781265391256
Print ISBN
9781266824142
Format
ePub
Útgáfa
10
Höfundar
TOKHEIM
Tungumál
English
Útgefið
2026-01-27
Prent takmörkun á líftíma
100
Prent takmörkun
2
Afritunar takmörkun
2

Kaflar

  • Table of Contents and Preface
  • Cover Page
  • Half Title Page
  • Title Page
  • Principles and Applications
  • Copyright Information
  • Contents
  • Chapter 1 Digital Electronics Page 1
  • Chapter 2 Numbers We Use in Digital Electronics Page 26
  • Chapter 3 Logic Gates Page 43
  • Chapter 4 Combining Logic Gates Page 96
  • Chapter 5 IC Specifications and Simple Interfacing Page 155
  • Chapter 6 Encoding, Decoding, and Seven-Segment Displays Page 212
  • Chapter 7 Flip-Flops Page 252
  • Chapter 8 Counters Page 278
  • Chapter 9 Shift Registers Page 321
  • Chapter 10 Arithmetic Circuits Page 345
  • Chapter 11 Memories Page 377
  • Chapter 12 Simple Digital Systems Page 419
  • Chapter 13 Computer Systems Page 461
  • Chapter 14 Connecting with Analog Devices Page 515
  • About the Authors
  • Acknowledgments
  • Preface
  • New to This Release
  • Connect Digital Features
  • Curated, Auto-Graded Question Banks
  • STEM Prep- Adaptive Pre-Requisite Assignments
  • Test Builder in McGraw Hill Connect®
  • Additional Resources
  • Remote Proctoring & Browser-Locking Capabilities
  • Guided Tour
  • Safety
  • General Safety Rules for Electricity and Electronics
  • Connect
  • Chapter 1: Digital Electronics
  • Chapter 1: Introduction
  • 1-1 What Is a Digital Signal?
  • Self-Test
  • 1-2 Why Use Digital Circuits?
  • Application: Automobile Fuel Indicators
  • Digital Circuitry: Advantages and Limitations
  • Self-Test
  • 1-3 Where Are Digital Circuits Used?
  • Self-Test
  • 1-4 How Do You Generate a Digital Signal?
  • Generating a Digital Signal
  • Multivibrator Circuits
  • Wiring a Multivibrator
  • Wiring a Debounced Switch
  • Wiring a One-Shot Multivibrator
  • Digital Trainer
  • Self-Test
  • 1-5 How Do You Test for a Digital Signal?
  • Self-Test
  • 1-6 Simple Instruments
  • Function Generator
  • Logic Probe
  • Oscilloscope
  • Self-Test
  • Chapter 1 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 2: Numbers We Use in Digital Electronics
  • Chapter 2: Introduction
  • 2-1 Counting in Decimal and Binary
  • Self-Test
  • 2-2 Place Value
  • Self-Test
  • 2-3 Binary to Decimal Conversion
  • Self-Test
  • 2-4 Decimal to Binary Conversion
  • Self-Test
  • 2-5 Electronic Translators
  • General Definitions
  • Application: Encoders and Decoders
  • Self-Test
  • 2-6 Hexadecimal Numbers
  • Self-Test
  • 2-7 Octal Numbers
  • Self-Test
  • 2-8 Bits, Bytes, Nibbles, and Word Size
  • Self-Test
  • Chapter 2 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 3: Logic Gates
  • Chapter 3: Introduction
  • 3-1 The AND Gate
  • Summary
  • Self-Test
  • 3-2 The OR Gate
  • Self-Test
  • 3-3 The Inverter and Buffer
  • Self-Test
  • 3-4 The NAND Gate
  • Self-Test
  • 3-5 The NOR Gate
  • Self-Test
  • 3-6 The Exclusive OR Gate
  • Self-Test
  • 3-7 The Exclusive NOR Gate
  • Self-Test
  • 3-8 The NAND Gate as a Universal Gate
  • Self-Test
  • 3-9 The NOR Gate as a Universal Gate
  • Self-Test
  • 3-10 Gates with More Than Two Inputs
  • Self-Test
  • 3-11 Using Inverters to Convert Gates
  • Self-Test
  • 3-12 Practical TTL Logic Gates
  • IC Packaging
  • IC Wiring
  • IC Part Numbers
  • Self-Test
  • 3-13 Practical CMOS Logic Gates
  • IC Packaging
  • IC Wiring
  • CMOS Subfamilies
  • Lower Voltage ICs
  • Self-Test
  • 3-14 Troubleshooting Simple Gate Circuits
  • Summary
  • Self-Test
  • 3-15 IEEE Logic Symbols
  • Self-Test
  • 3-16 Simple Logic Gate Applications
  • Self-Test
  • 3-17 Logic Functions Using Software (BASIC Stamp Module)
  • PBASIC Program: Two-Input AND Function
  • Programming Other Logic Functions
  • Self-Test
  • Chapter 3 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 4: Combining Logic Gates
  • Chapter 4: Introduction
  • 4-1 Constructing Circuits from Boolean Expressions
  • Self-Test
  • 4-2 Drawing a Circuit from a Maxterm Boolean Expression
  • Self-Test
  • 4-3 Truth Tables and Boolean Expressions
  • Truth Table to Boolean Expression
  • Boolean Expression to Truth Table
  • Circuit Simulation Conversions
  • Self-Test
  • 4-4 Sample Problem
  • Self-Test
  • 4-5 Simplifying Boolean Expressions
  • Self-Test
  • 4-6 Boolean Algebra
  • Self-Test
  • 4-7 Karnaugh Maps
  • Self-Test
  • 4-8 Karnaugh Maps with Three Variables
  • Self-Test
  • 4-9 Karnaugh Maps with Four Variables
  • Self-Test
  • 4-10 More Karnaugh Maps
  • Self-Test
  • 4-11 A Five-Variable Karnaugh Map
  • Self-Test
  • 4-12 Using NAND Logic
  • Self-Test
  • 4-13 Computer Simulations: Logic Converter
  • Self-Test
  • 4-14 Solving Logic Problems: Data Selectors
  • Solving Logic Problems
  • Summary
  • Self-Test
  • 4-15 Programmable Logic Devices (PLDs)
  • Advantages of PLDs
  • Programming PLDs
  • What’s Inside the PLD?
  • Practical PLDs
  • Self-Test
  • 4-16 Using De Morgan’s Theorems
  • Boolean Expressions: Keyboard Version
  • Minterm to Maxterms or Maxterm to Minterms
  • Summary
  • Self-Test
  • 4-17 Solving a Logic Problem (BASIC Stamp Module)
  • PBASIC Program: 3in-3out Logic Problem
  • Self-Test
  • Chapter 4 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 5: IC Specifications and Simple Interfacing
  • Chapter 5: Introduction
  • 5-1 Logic Levels and Noise Margin
  • Logic Levels: TTL
  • Logic Levels: CMOS
  • Logic Levels: Low-Voltage CMOS
  • Noise Margin
  • Self-Test
  • 5-2 Other Digital IC Specifications
  • Drive Capabilities
  • Propagation Delay
  • Power Dissipation
  • Self-Test
  • 5-3 MOS and CMOS ICs
  • MOS ICs
  • CMOS ICs
  • Self-Test
  • 5-4 Interfacing TTL and CMOS with Switches
  • Switch Debouncing
  • Self-Test
  • 5-5 Interfacing TTL and CMOS with LEDs
  • CMOS-To-LED Interfacing
  • TTL-To-LED Interfacing
  • Current Sourcing and Current Sinking
  • Improved LED Output Indicators
  • Self-Test
  • 5-6 Interfacing TTL and CMOS ICs
  • Self-Test
  • 5-7 Interfacing with Buzzers, Relays, Motors, and Solenoids
  • Interfacing with Buzzers
  • Interfacing Using Relays
  • Self-Test
  • 5-8 Optoisolators
  • Self-Test
  • 5-9 Interfacing with Servo and Stepper Motors
  • Servo Motor
  • Stepper Motor
  • Stepper Motor Control Sequence
  • Stepper Motor Interfacing
  • Summary
  • Self-Test
  • 5-10 Using Hall-Effect Sensors
  • Basic Hall-Effect Sensor
  • Hall-Effect Switch
  • Gear-Tooth Sensing
  • Self-Test
  • 5-11 Troubleshooting Simple Logic Circuits
  • Self-Test
  • 5-12 Interfacing the Servo (BASIC Stamp Module)
  • PBASIC Program—ServoTest 1
  • Self-Test
  • Chapter 5 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 6: Encoding, Decoding, and Seven-Segment Displays
  • Chapter 6: Introduction
  • 6-1 The 8421 BCD Code
  • Self-Test
  • 6-2 The Excess-3 Code
  • Self-Test
  • 6-3 The Gray Code
  • Shaft Encoder
  • Quadrature Encoder
  • Self-Test
  • 6-4 The ASCII Code
  • Self-Test
  • 6-5 Encoders
  • Self-Test
  • 6-6 Seven-Segment LED Displays
  • Display Technologies
  • Light-Emitting Diode
  • Seven-Segment LED Display
  • Self-Test
  • 6-7 Decoders
  • Self-Test
  • 6-8 BCD-to-Seven-Segment Decoder/Drivers
  • Self-Test
  • 6-9 Liquid-Crystal Displays
  • Monochrome LCD
  • Driving the LCD
  • Commercial LCDs
  • Color LCDs
  • Self-Test
  • 6-10 Using CMOS to Drive an LCD Display
  • Self-Test
  • 6-11 Vacuum Fluorescent Displays
  • Self-Test
  • 6-12 Driving a VF Display
  • Self-Test
  • 6-13 Troubleshooting a Decoding Circuit
  • Circuit 1
  • Circuit 2
  • Self-Test
  • Chapter 6 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 7: Flip-Flops
  • Chapter 7: Introduction
  • 7-1 The R-S Flip-Flop
  • Self-Test
  • 7-2 The Clocked R-S Flip-Flop
  • Self-Test
  • 7-3 The D Flip-Flop
  • Self-Test
  • 7-4 The J-K Flip-Flop
  • Self-Test
  • 7-5 IC Latches
  • Self-Test
  • 7-6 Triggering Flip-Flops
  • Self-Test
  • 7-7 Schmitt Trigger
  • Self-Test
  • 7-8 IEEE Logic Symbols
  • Self-Test
  • 7-9 Application: Latched Encoder-Decoder System
  • Self-Test
  • Chapter 7 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 8: Counters
  • Chapter 8: Introduction
  • 8-1 Ripple Counters
  • Self-Test
  • 8-2 Mod-10 Ripple Counters
  • Self-Test
  • 8-3 Synchronous Counters
  • Self-Test
  • 8-4 Down Counters
  • Self-Test
  • 8-5 Self-Stopping Counters
  • Self-Test
  • 8-6 Counters as Frequency Dividers
  • Self-Test
  • 8-7 TTL IC Counters
  • The 7493 4-Bit Counter
  • The 74192 Up/Down Decade Counter
  • Applications
  • Self-Test
  • 8-8 CMOS IC Counters
  • The 74HC393 4-Bit Binary Counter
  • The 74HC193 4-Bit Binary Up/Down Counter
  • Applications
  • Self-Test
  • 8-9 A Three-Digit BCD Counter
  • Application
  • Self-Test
  • 8-10 Counting Real-World Events
  • Self-Test
  • 8-11 Using a CMOS Counter in an Electronic Game
  • Self-Test
  • 8-12 Using Counters—An Experimental Tachometer
  • Self-Test
  • 8-13 Troubleshooting a Counter
  • Self-Test
  • Chapter 8 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 9: Shift Registers
  • Chapter 9: Introduction
  • 9-1 Serial-Load Shift Registers
  • Self-Test
  • 9-2 Parallel-Load Shift Registers
  • Self-Test
  • 9-3 A Universal Shift Register
  • Self-Test
  • 9-4 Using the 74LS194 IC Shift Register
  • Self-Test
  • 9-5 An 8-Bit CMOS Shift Register
  • Self-Test
  • 9-6 Using Shift Registers: Digital Roulette
  • Self-Test
  • 9-7 Troubleshooting a Simple Shift Register
  • Self-Test
  • Chapter 9 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 10: Arithmetic Circuits
  • Chapter 10: Introduction
  • 10-1 Binary Addition
  • Self-Test
  • 10-2 Half Adders
  • Self-Test
  • 10-3 Full Adders
  • Self-Test
  • 10-4 3-Bit Adders
  • Self-Test
  • 10-5 Binary Subtraction
  • Self-Test
  • 10-6 Parallel Subtractors
  • Self-Test
  • 10-7 IC Adders
  • Self-Test
  • 10-8 Binary Multiplication
  • Self-Test
  • 10-9 Binary Multipliers
  • Self-Test
  • 10-10 2s Complement Notation, Addition, and Subtraction
  • 2s Complement 4-bit
  • 2s Complement Addition
  • 2s Complement Subtraction
  • 2s Complement 8-bit
  • Self-Test
  • 10-11 2s Complement Adders/Subtractors
  • Self-Test
  • 10-12 Troubleshooting a Full Adder
  • Self-Test
  • Chapter 10 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 11: Memories
  • Chapter 11: Introduction
  • 11-1 Overview of Memory
  • Memory Devices in Computers
  • Magnetic Storage
  • Optical Storage
  • Semiconductor Storage
  • Semiconductor Storage Cells
  • Self-Test
  • 11-2 Random-Access Memory (RAM)
  • Self-Test
  • 11-3 Static RAM ICs
  • Self-Test
  • 11-4 Using a SRAM
  • Self-Test
  • 11-5 Read-Only Memory (ROM)
  • Self-Test
  • 11-6 Using a ROM
  • Self-Test
  • 11-7 Programmable Read-Only Memory (PROM)
  • Self-Test
  • 11-8 Nonvolatile Read/Write Memory
  • Battery Backup SRAM
  • NVSRAM
  • Flash Memory
  • Ferroelectric RAM
  • Magnetoresistive RAM
  • Self-Test
  • 11-9 Memory Packaging
  • Self-Test
  • 11-10 Computer Bulk Storage Devices
  • Mechanical Devices
  • Magnetic Devices
  • Hard Disks
  • Floppy Disks
  • Optical Discs
  • USB Flash Memory
  • Access Time
  • Self-Test
  • 11-11 Digital Potentiometer: Using NV Memory
  • Self-Test
  • Chapter 11 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 12: Simple Digital Systems
  • Chapter 12: Introduction
  • 12-1 Elements of a System
  • BASIC Stamp 2 Module
  • Self-Test
  • 12-2 A Digital System on an IC
  • Self-Test
  • 12-3 Digital Games
  • Simple Dice Game
  • Self-Test
  • 12-4 The Digital Clock
  • Self-Test
  • 12-5 The LSI Digital Clock
  • 50- or 60-Hz Input (Pin 16)
  • 50- or 60-Hz Select Input (Pin 11)
  • Time-Setting Inputs (Pins 13, 14, and 15)
  • 12- or 24-H Select Input (Pin 10)
  • Output MUX Operation (Pins 3 to 9 and 17 to 22)
  • Multiplex Timing Input (Pin 23)
  • Four/Six-Digit Select Input (Pin 24)
  • Output Enable Input (Pin 1)
  • Power Inputs (Pins 2 and 12)
  • Real-Time Clocks
  • Self-Test
  • 12-6 The Frequency Counter
  • Self-Test
  • 12-7 An Experimental Frequency Counter
  • Self-Test
  • 12-8 LCD Timer with Alarm
  • Time Base
  • Self-Stopping Down Counters
  • 8-Bit Magnitude Comparator
  • Decoder/Driver
  • Self-Test
  • 12-9 Simple Distance Sensing
  • Infrared-Light Distance Sensor
  • Ultrasonic Distance Sensor
  • Testing a Distance Sensor
  • Noncontact Operation with Distance Sensor
  • Self-Test
  • 12-10 JTAG/Boundary Scan
  • Self-Test
  • Chapter 12 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 13: Computer Systems
  • Chapter 13: Introduction
  • 13-1 The Computer
  • Self-Test
  • 13-2 The Microcomputer
  • Self-Test
  • 13-3 Microcomputer Operation
  • Self-Test
  • 13-4 Microcomputer Address Decoding
  • Self-Test
  • 13-5 Data Transmission
  • Self-Test
  • 13-6 Detecting Errors in Data Transmissions
  • Self-Test
  • 13-7 Data Transmission in a Computer System
  • Keyboard Port
  • Mouse Port
  • Video Port
  • Serial Port
  • Parallel Port
  • Audio Ports
  • USB Port
  • Ethernet Port
  • Transmission Example
  • Self-Test
  • 13-8 Programmable Logic Controllers
  • Self-Test
  • 13-9 Microcontrollers
  • Microcontrollers Compared to Microprocessors
  • A Family of Microcontrollers
  • The PIC16C55 Microcontroller
  • Self-Test
  • 13-10 The BASIC Stamp Microcontroller Modules
  • Simple BASIC Stamp Programming
  • Self-Test
  • 13-11 Digital Signal Processing
  • Self-Test
  • 13-12 DSP in a Digital Camera
  • Self-Test
  • 13-13 Microcontroller: Photo Input and Servo Motor Output
  • Wiring the BASIC Stamp Circuit
  • BASIC Stamp Programming
  • Self-Test
  • Chapter 13 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Chapter 14: Connecting with Analog Devices
  • Chapter 14: Introduction
  • 14-1 D/A Conversion
  • Self-Test
  • 14-2 Operational Amplifiers
  • Self-Test
  • 14-3 A Basic D/A Converter
  • Self-Test
  • 14-4 Ladder-Type D/A Converters
  • Self-Test
  • 14-5 An A/D Converter
  • Self-Test
  • 14-6 Voltage Comparators
  • Self-Test
  • 14-7 An Elementary Digital Voltmeter
  • Self-Test
  • 14-8 Other A/D Converters
  • Self-Test
  • 14-9 A/D Converter Specifications
  • Type of Output
  • Resolution
  • Accuracy
  • Conversion Time
  • Other Specifications
  • Self-Test
  • 14-10 An A/D Converter IC
  • Self-Test
  • 14-11 Digital Light Meter
  • Self-Test
  • 14-12 Digitizing Temperature
  • Self-Test
  • Chapter 14 Summary and Review
  • Summary
  • Correlated Experiments
  • Chapter Review Questions
  • Critical Thinking Questions
  • Answers to Self-Tests
  • Appendix A
  • Appendix A: Solder and the Soldering Process
  • From a Simple Task to a Fine Art
  • The Advantages of Soldering
  • The Nature of Solder
  • The Wetting Action
  • The Role of Flux
  • Soldering Irons
  • Controlling Heat at the Joint
  • Selecting the Soldering Iron and Tip
  • Making the Solder Connection
  • Final Inspection and Removal of Flux
  • What the Law Requires
  • Appendix B
  • Appendix B: 2s Complement Conversions
  • Glossary of Terms and Symbols
  • Glossary of Terms and Symbols
  • Index
  • Index
  • A
  • B
  • C
  • D
  • E
  • F
  • G
  • H
  • I
  • J
  • K
  • L
  • M
  • N
  • O
  • P
  • Q
  • R
  • S
  • T
  • U
  • V
  • W
  • X
  • Z
  • Accessibility Content: Extended Description for Images
  • A Tech Graphic with Circles Extended Description (FM)
  • Chapter 1 Page Titled Digital Extended Description (FM)
  • A Page Titled 2-6 Hexadecimal Numbers Extended Description (FM)
  • A Self-test Page with Five Extended Description (FM)
  • A Textbook Text on Boolean Expressions and a History Extended Description (FM)
  • An Excerpt with Numbered Points Extended Description (FM)
  • A Schematic Showing a Free Running Extended Description (FM)
  • A Chapter Summary Page Titled Chapter 1 Extended Description (FM)
  • A Page Section with Two Red Extended Description (FM)
  • A Section Titled Correlated Experiments Extended Description (FM)
  • A Laptop Screen Displays a Digital Textbook Extended Description (FM)
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  • Fig. 3-89 Extended Description (Chapter 3)
  • Fig. 3-90 Extended Description (Chapter 3)
  • Fig. 3-91 Extended Description (Chapter 3)
  • Fig. 3-92 Extended Description (Chapter 3)
  • Fig. 4-2 Extended Description (Chapter 4)
  • Fig. 4-3 Extended Description (Chapter 4)
  • Fig. 4-4 Extended Description (Chapter 4)
  • Fig. 4-5 Extended Description (Chapter 4)
  • Fig. 4-6 Extended Description (Chapter 4)
  • Fig. 4-7 Extended Description (Chapter 4)
  • Fig. 4-8 Extended Description (Chapter 4)
  • A Digital Thermometer Extended Description (Chapter 4)
  • Fig. 4-9 Extended Description (Chapter 4)
  • Fig. 4-12 Extended Description (Chapter 4)
  • Fig. 4-13 Extended Description (Chapter 4)
  • Fig. 4-15 Extended Description (Chapter 4)
  • Fig. 4-16 Extended Description (Chapter 4)
  • Fig. 4-17 Extended Description (Chapter 4)
  • Fig. 4-18 Extended Description (Chapter 4)
  • Fig. 4-19 Extended Description (Chapter 4)
  • Fig. 4-20 Extended Description (Chapter 4)
  • Fig. 4-21 Extended Description (Chapter 4)
  • Fig. 4-22 Extended Description (Chapter 4)
  • Fig. 4-23 Extended Description (Chapter 4)
  • Fig. 4-24 Extended Description (Chapter 4)
  • Fig. 4-25 Extended Description (Chapter 4)
  • Fig. 4-26 Extended Description (Chapter 4)
  • Fig. 4-27 Extended Description (Chapter 4)
  • Fig. 4-28 Extended Description (Chapter 4)
  • Fig. 4-31 Extended Description (Chapter 4)
  • Fig. 4-32 Extended Description (Chapter 4)
  • Fig. 4-33 Extended Description (Chapter 4)
  • Fig. 4-34 Extended Description (Chapter 4)
  • Fig. 4-35 Extended Description (Chapter 4)
  • Fig. 4-36 Extended Description (Chapter 4)
  • Fig. 4-37 Extended Description (Chapter 4)
  • Fig. 4-38 Extended Description (Chapter 4)
  • Fig. 4-39 Extended Description (Chapter 4)
  • Fig. 4-40 Extended Description (Chapter 4)
  • Fig. 4-41 Extended Description (Chapter 4)
  • Fig. 4-42 Extended Description (Chapter 4)
  • Fig. 4-43 Extended Description (Chapter 4)
  • Fig. 4-44 Extended Description (Chapter 4)
  • Fig. 4-45 Extended Description (Chapter 4)
  • Fig. 4-46 Extended Description (Chapter 4)
  • Fig. 4-47 Extended Description (Chapter 4)
  • Fig. 4-48 Extended Description (Chapter 4)
  • Fig. 4-49 Extended Description (Chapter 4)
  • Fig. 4-50 Extended Description (Chapter 4)
  • Fig. 4-51 Extended Description (Chapter 4)
  • Fig. 4-52 Extended Description (Chapter 4)
  • Fig. 4-53 Extended Description (Chapter 4)
  • Fig. 4-54a Extended Description (Chapter 4)
  • Fig. 4-54b Extended Description (Chapter 4)
  • Fig. 4-54c Extended Description (Chapter 4)
  • Fig. 4-54d Extended Description (Chapter 4)
  • Fig. 4-55 Extended Description (Chapter 4)
  • Fig. 4-57 Extended Description (Chapter 4)
  • Fig. 4-58 Extended Description (Chapter 4)
  • Fig. 4-59 Extended Description (Chapter 4)
  • Fig. 4-60 Extended Description (Chapter 4)
  • Fig. 4-61 Extended Description (Chapter 4)
  • Fig. 4-62 Extended Description (Chapter 4)
  • Fig. 4-63 Extended Description (Chapter 4)
  • Fig. 4-64 Extended Description (Chapter 4)
  • Fig. 4-65 Extended Description (Chapter 4)
  • Fig. 4-66 Extended Description (Chapter 4)
  • Fig. 4-67 Extended Description (Chapter 4)
  • Fig. 4-68 Extended Description (Chapter 4)
  • Fig. 4-69 Extended Description (Chapter 4)
  • Fig. 4-70 Extended Description (Chapter 4)
  • Fig. 4-71 Extended Description (Chapter 4)
  • Fig. 4-72 Extended Description (Chapter 4)
  • Fig. 4-73 Extended Description (Chapter 4)
  • Fig. 4-75 Extended Description (Chapter 4)
  • Fig. 4-76 Extended Description (Chapter 4)
  • Fig. 4-79 Extended Description (Chapter 4)
  • Fig. 4-83 Extended Description (Chapter 4)
  • Fig. 4-84 Extended Description (Chapter 4)
  • Inputs A and B Feed Two AND Gates Extended Description (Chapter 4)
  • A and B Feed Two OR Gates Extended Description (Chapter 4)
  • C, B, and A each Feed Inverters Extended Description (Chapter 4)
  • A Three-row, Two-column Karnaugh Extended Description (Chapter 4)
  • A Karnaugh Map with Four Extended Description (Chapter 4)
  • A Four-row, Four-column Extended Description (Chapter 4)
  • A Four-by-four Karnaugh Map Extended Description (Chapter 4)
  • A Four-by-four Karnaugh Map Extended Description (Chapter 4)
  • A Four-row, Two-column Karnaugh Extended Description (Chapter 4)
  • Two Stacked Karnaugh Maps Extended Description (Chapter 4)
  • A Logic Circuit with Inputs A and B Extended Description (Chapter 4)
  • Logic Diagram with Inputs A, B Extended Description (Chapter 4)
  • A Logic Circuit with Inputs A, B, C Extended Description (Chapter 4)
  • A Logic Circuit with Inputs A, B, C Extended Description (Chapter 4)
  • A Multiplexer Diagram with Sixteen Data Extended Description (Chapter 4)
  • A Logic Circuit with Inputs A, B, and C Extended Description (Chapter 4)
  • A Logic Circuit with Inputs A, B, C Extended Description (Chapter 4)
  • Fig. 5-1 Extended Description (Chapter 5)
  • Fig. 5-2 Extended Description (Chapter 5)
  • Fig. 5-3 Extended Description (Chapter 5)
  • Fig. 5-4 Extended Description (Chapter 5)
  • Fig. 5-5 Extended Description (Chapter 5)
  • Fig. 5-6 Extended Description (Chapter 5)
  • Fig. 5-7 Extended Description (Chapter 5)
  • Fig. 5-8 Extended Description (Chapter 5)
  • Fig. 5-10 Extended Description (Chapter 5)
  • Fig. 5-11 Extended Description (Chapter 5)
  • Fig. 5-12 Extended Description (Chapter 5)
  • Fig. 5-13 Extended Description (Chapter 5)
  • Fig. 5-14 Extended Description (Chapter 5)
  • Fig. 5-15 Extended Description (Chapter 5)
  • Fig. 5-16 Extended Description (Chapter 5)
  • Fig. 5-17 Extended Description (Chapter 5)
  • Fig. 5-18 Extended Description (Chapter 5)
  • Fig. 5-19 Extended Description (Chapter 5)
  • Fig. 5-20 Extended Description (Chapter 5)
  • Fig. 5-21 Extended Description (Chapter 5)
  • Fig. 5-22 Extended Description (Chapter 5)
  • Fig. 5-23 Extended Description (Chapter 5)
  • Fig. 5-24 Extended Description (Chapter 5)
  • Fig. 5-25 Extended Description (Chapter 5)
  • Fig. 5-26 Extended Description (Chapter 5)
  • Fig. 5-27 Extended Description (Chapter 5)
  • Fig. 5-28 Extended Description (Chapter 5)
  • Fig. 5-29 Extended Description (Chapter 5)
  • Fig. 5-30 Extended Description (Chapter 5)
  • Fig. 5-31 Extended Description (Chapter 5)
  • Fig. 5-32 Extended Description (Chapter 5)
  • Fig. 5-33 Extended Description (Chapter 5)
  • Fig. 5-34 Extended Description (Chapter 5)
  • Fig. 5-35 Extended Description (Chapter 5)
  • Fig. 5-36 Extended Description (Chapter 5)
  • Fig. 5-37 Extended Description (Chapter 5)
  • Fig. 5-38 Extended Description (Chapter 5)
  • Fig. 5-39 Extended Description (Chapter 5)
  • Fig. 5-40 Extended Description (Chapter 5)
  • Fig. 5-41 Extended Description (Chapter 5)
  • Fig. 5-42 Extended Description (Chapter 5)
  • Fig. 5-43 Extended Description (Chapter 5)
  • Fig. 5-44 Extended Description (Chapter 5)
  • Fig. 5-45 Extended Description (Chapter 5)
  • Fig. 5-46 Extended Description (Chapter 5)
  • Fig. 5-48 Extended Description (Chapter 5)
  • Fig. 5-49 Extended Description (Chapter 5)
  • Fig. 5-50 Extended Description (Chapter 5)
  • Fig. 5-51 Extended Description (Chapter 5)
  • Fig. 5-52 Extended Description (Chapter 5)
  • Fig. 6-1 Extended Description (Chapter 6)
  • Fig. 6-2 Extended Description (Chapter 6)
  • Fig. 6-3 Extended Description (Chapter 6)
  • Fig. 6-4 Extended Description (Chapter 6)
  • Fig. 6-5 Extended Description (Chapter 6)
  • Fig. 6-6 Extended Description (Chapter 6)
  • Fig. 6-7 Extended Description (Chapter 6)
  • Fig. 6-8 Extended Description (Chapter 6)
  • Fig. 6-9 Extended Description (Chapter 6)
  • Fig. 6-10 Extended Description (Chapter 6)
  • Fig. 6-11 Extended Description (Chapter 6)
  • Fig. 6-12 Extended Description (Chapter 6)
  • Fig. 6-13 Extended Description (Chapter 6)
  • Fig. 6-14 Extended Description (Chapter 6)
  • Fig. 6-15 Extended Description (Chapter 6)
  • Fig. 6-16 Extended Description (Chapter 6)
  • Fig. 6-17 Extended Description (Chapter 6)
  • Fig. 6-18 Extended Description (Chapter 6)
  • Fig. 6-19 Extended Description (Chapter 6)
  • Fig. 6-20 Extended Description (Chapter 6)
  • Fig. 6-21 Extended Description (Chapter 6)
  • Fig. 6-22 Extended Description (Chapter 6)
  • Fig. 6-23 Extended Description (Chapter 6)
  • Fig. 6-24 Extended Description (Chapter 6)
  • Fig. 6-25 Extended Description (Chapter 6)
  • Fig. 6-26 Extended Description (Chapter 6)
  • Fig. 6-27 Extended Description (Chapter 6)
  • Fig. 6-28 Extended Description (Chapter 6)
  • Fig. 6-29 Extended Description (Chapter 6)
  • Fig. 6-30 Extended Description (Chapter 6)
  • Fig. 6-31 Extended Description (Chapter 6)
  • Fig. 6-32 Extended Description (Chapter 6)
  • Fig. 6-33 Extended Description (Chapter 6)
  • Fig. 6-34 Extended Description (Chapter 6)
  • Fig. 6-35 Extended Description (Chapter 6)
  • Fig. 6-36 Extended Description (Chapter 6)
  • Fig. 6-37 Extended Description (Chapter 6)
  • Fig. 6-38 Extended Description (Chapter 6)
  • Fig. 6-39 Extended Description (Chapter 6)
  • Fig. 6-40 Extended Description (Chapter 6)
  • Fig. 6-41 Extended Description (Chapter 6)
  • Fig. 6-42 Extended Description (Chapter 6)
  • Fig. 7-1 Extended Description (Chapter 7)
  • Fig. 7-2 Extended Description (Chapter 7)
  • Fig. 7-3 Extended Description (Chapter 7)
  • Fig. 7-4 Extended Description (Chapter 7)
  • Fig. 7-5 Extended Description (Chapter 7)
  • Fig. 7-6 Extended Description (Chapter 7)
  • Fig. 7-7 Extended Description (Chapter 7)
  • Fig. 7-8 Extended Description (Chapter 7)
  • Fig. 7-9 Extended Description (Chapter 7)
  • Fig. 7-10 Extended Description (Chapter 7)
  • Fig. 7-11 Extended Description (Chapter 7)
  • Fig. 7-12 Extended Description (Chapter 7)
  • Fig. 7-13 Extended Description (Chapter 7)
  • Fig. 7-14 Extended Description (Chapter 7)
  • Fig. 7-15 Extended Description (Chapter 7)
  • Fig. 7-16 Extended Description (Chapter 7)
  • Fig. 7-17 Extended Description (Chapter 7)
  • Fig. 7-18 Extended Description (Chapter 7)
  • Fig. 7-19 Extended Description (Chapter 7)
  • Fig. 7-20 Extended Description (Chapter 7)
  • Fig. 7-21 Extended Description (Chapter 7)
  • Fig. 7-22 Extended Description (Chapter 7)
  • Fig. 7-23 Extended Description (Chapter 7)
  • Fig. 7-25 Extended Description (Chapter 7)
  • Fig. 7-26 Extended Description (Chapter 7)
  • Fig. 7-27 Extended Description (Chapter 7)
  • Fig. 7-28 Extended Description (Chapter 7)
  • Fig. 7-29 Extended Description (Chapter 7)
  • Fig. 7-30 Extended Description (Chapter 7)
  • Fig. 7-31 Extended Description (Chapter 7)
  • Fig. 7-33 Extended Description (Chapter 7)
  • Fig. 7-34 Extended Description (Chapter 7)
  • Fig. 8-2 Extended Description (Chapter 8)
  • Fig. 8-3 Extended Description (Chapter 8)
  • Fig. 8-4 Extended Description (Chapter 8)
  • Fig. 8-5 Extended Description (Chapter 8)
  • Fig. 8-6 Extended Description (Chapter 8)
  • Fig. 8-7 Extended Description (Chapter 8)
  • Fig. 8-8 Extended Description (Chapter 8)
  • Fig. 8-9 Extended Description (Chapter 8)
  • Fig. 8-10 Extended Description (Chapter 8)
  • Fig. 8-12 Extended Description (Chapter 8)
  • Fig. 8-13 Extended Description (Chapter 8)
  • Fig. 8-14 Extended Description (Chapter 8)
  • Fig. 8-15 Extended Description (Chapter 8)
  • Fig. 8-16 Extended Description (Chapter 8)
  • Fig. 8-17 Extended Description (Chapter 8)
  • Fig. 8-18 Extended Description (Chapter 8)
  • Fig. 8-19 Extended Description (Chapter 8)
  • Fig. 8-20 Extended Description (Chapter 8)
  • Fig. 8-21 Extended Description (Chapter 8)
  • Fig. 8-22 Extended Description (Chapter 8)
  • Fig. 8-23 Extended Description (Chapter 8)
  • Fig. 8-24 Extended Description (Chapter 8)
  • Fig. 8-25 Extended Description (Chapter 8)
  • Fig. 8-26 Extended Description (Chapter 8)
  • Fig. 8-28 Extended Description (Chapter 8)
  • Fig. 8-29 Extended Description (Chapter 8)
  • Fig. 8-30 Extended Description (Chapter 8)
  • Fig. 8-31 Extended Description (Chapter 8)
  • Fig. 8-32 Extended Description (Chapter 8)
  • Fig. 8-33 Extended Description (Chapter 8)
  • Fig. 8-34 Extended Description (Chapter 8)
  • Fig. 8-36 Extended Description (Chapter 8)
  • Fig. 8-37 Extended Description (Chapter 8)
  • Fig. 8-38 Extended Description (Chapter 8)
  • Fig. 9-1 Extended Description (Chapter 9)
  • Fig. 9-2 Extended Description (Chapter 9)
  • Fig. 9-3 Extended Description (Chapter 9)
  • Fig. 9-4 Extended Description (Chapter 9)
  • Fig. 9-5 Extended Description (Chapter 9)
  • Fig. 9-6 Extended Description (Chapter 9)
  • Fig. 9-7 Extended Description (Chapter 9)
  • Fig. 9-8 Extended Description (Chapter 9)
  • Fig. 9-9 Extended Description (Chapter 9)
  • Fig. 9-10 Extended Description (Chapter 9)
  • Fig. 9-11 Extended Description (Chapter 9)
  • Fig. 9-12 Extended Description (Chapter 9)
  • Fig. 9-13 Extended Description (Chapter 9)
  • Fig. 9-14 Extended Description (Chapter 9)
  • Fig. 9-15 Extended Description (Chapter 9)
  • Fig. 9-16 Extended Description (Chapter 9)
  • Fig. 9-17 Extended Description (Chapter 9)
  • Fig. 9-18 Extended Description (Chapter 9)
  • Fig. 9-19 Extended Description (Chapter 9)
  • Fig. 10-1 Extended Description (Chapter 10)
  • Fig. 10-2 Extended Description (Chapter 10)
  • Fig. 10-3 Extended Description (Chapter 10)
  • Fig. 10-4 Extended Description (Chapter 10)
  • Fig. 10-5 Extended Description (Chapter 10)
  • Fig. 10-6 Extended Description (Chapter 10)
  • Fig. 10-7 Extended Description (Chapter 10)
  • Fig. 10-8 Extended Description (Chapter 10)
  • Logic Circuit has Two Input XOR Gate and Two Input Extended Description (Chapter 10)
  • Logic Circuit has Five, 2-Input Gates Extended Description (Chapter 10)
  • Fig. 10-9 Extended Description (Chapter 10)
  • Fig. 10-10 Extended Description (Chapter 10)
  • Fig. 10-11 Extended Description (Chapter 10)
  • Fig. 10-12 Extended Description (Chapter 10)
  • Fig. 10-13 Extended Description (Chapter 10)
  • Fig. 10-14 Extended Description (Chapter 10)
  • Fig. 10-15 Extended Description (Chapter 10)
  • Fig. 10-16 Extended Description (Chapter 10)
  • Fig. 10-17 Extended Description (Chapter 10)
  • Fig. 10-18 Extended Description (Chapter 10)
  • Fig. 10-19 Extended Description (Chapter 10)
  • Fig. 10-20 Extended Description (Chapter 10)
  • Fig. 10-22 Extended Description (Chapter 10)
  • Fig. 10-23 Extended Description (Chapter 10)
  • Fig. 10-24 Extended Description (Chapter 10)
  • Fig. 10-25 Extended Description (Chapter 10)
  • Fig. 10-26 Extended Description (Chapter 10)
  • Fig. 10-27 Extended Description (Chapter 10)
  • Fig. 10-28 Extended Description (Chapter 10)
  • Fig. 10-29 Extended Description (Chapter 10)
  • Fig. 10-30 Extended Description (Chapter 10)
  • Fig. 10-31 Extended Description (Chapter 10)
  • Logic circuit has two input Extended Description (Chapter 10)
  • Logic circuit Extended Description (Chapter 10)
  • Fig. 11-1 Extended Description (Chapter 11)
  • Fig. 11-2 Extended Description (Chapter 11)
  • Fig. 11-4 Extended Description (Chapter 11)
  • Fig. 11-5 Extended Description (Chapter 11)
  • Fig. 11-6 Extended Description (Chapter 11)
  • Fig. 11-7 Extended Description (Chapter 11)
  • Fig. 11-8 Extended Description (Chapter 11)
  • Fig. 11-9 Extended Description (Chapter 11)
  • Fig. 11-11 Extended Description (Chapter 11)
  • Fig. 11-12 Extended Description (Chapter 11)
  • Fig. 11-13 Extended Description (Chapter 11)
  • Fig. 11-14 Extended Description (Chapter 11)
  • Fig. 11-19 Extended Description (Chapter 11)
  • Fig. 11-20 Extended Description (Chapter 11)
  • Fig. 11-22 Extended Description (Chapter 11)
  • Fig. 11-23 Extended Description (Chapter 11)
  • Fig. 11-24 Extended Description (Chapter 11)
  • Fig. 11-25 Extended Description (Chapter 11)
  • Fig. 11-26 Extended Description (Chapter 11)
  • Fig. 12-1 Extended Description (Chapter 12)
  • Fig. 12-2 Extended Description (Chapter 12)
  • Fig. 12-3 Extended Description (Chapter 12)
  • Fig. 12-4 Extended Description (Chapter 12)
  • Fig. 12-5 Extended Description (Chapter 12)
  • Fig. 12-6 Extended Description (Chapter 12)
  • Fig. 12-7 Extended Description (Chapter 12)
  • Fig. 12-8 Extended Description (Chapter 12)
  • Fig. 12-9 Extended Description (Chapter 12)
  • Fig. 12-10 Extended Description (Chapter 12)
  • Fig. 12-12 Extended Description (Chapter 12)
  • Fig. 12-13 Extended Description (Chapter 12)
  • Fig. 12-14 Extended Description (Chapter 12)
  • Fig. 12-15 Extended Description (Chapter 12)
  • Fig. 12-16 Extended Description (Chapter 12)
  • Fig. 12-17 Extended Description (Chapter 12)
  • Fig. 12-18 Extended Description (Chapter 12)
  • Fig. 12-19 Extended Description (Chapter 12)
  • Fig. 12-20 Extended Description (Chapter 12)
  • Fig. 12-21 Extended Description (Chapter 12)
  • Fig. 12-22 Extended Description (Chapter 12)
  • Fig. 12-23 Extended Description (Chapter 12)
  • Fig. 12-24 Extended Description (Chapter 12)
  • Fig. 12-25 Extended Description (Chapter 12)
  • Fig. 12-26 Extended Description (Chapter 12)
  • Fig. 12-27 Extended Description (Chapter 12)
  • Fig. 12-28 Extended Description (Chapter 12)
  • Fig. 12-29 Extended Description (Chapter 12)
  • Fig. 13-1 Extended Description (Chapter 13)
  • Fig. 13-2 Extended Description (Chapter 13)
  • Fig. 13-3 Extended Description (Chapter 13)
  • Fig. 13-4 Extended Description (Chapter 13)
  • Fig. 13-5 Extended Description (Chapter 13)
  • Fig. 13-6 Extended Description (Chapter 13)
  • Fig. 13-7 Extended Description (Chapter 13)
  • Fig. 13-8 Extended Description (Chapter 13)
  • Fig. 13-9 Extended Description (Chapter 13)
  • Fig. 13-10 Extended Description (Chapter 13)
  • Fig. 13-11 Extended Description (Chapter 13)
  • Fig. 13-12 Extended Description (Chapter 13)
  • Fig. 13-13 Extended Description (Chapter 13)
  • Fig. 13-14 Extended Description (Chapter 13)
  • Fig. 13-15 Extended Description (Chapter 13)
  • Fig. 13-16 Extended Description (Chapter 13)
  • Fig. 13-17 Extended Description (Chapter 13)
  • Fig. 13-18 Extended Description (Chapter 13)
  • Fig. 13-19 Extended Description (Chapter 13)
  • Fig. 13-20 Extended Description (Chapter 13)
  • Fig. 13-21 Extended Description (Chapter 13)
  • Fig. 13-22 Extended Description (Chapter 13)
  • Fig. 13-23 Extended Description (Chapter 13)
  • Fig. 13-24 Extended Description (Chapter 13)
  • Example 13-1 Extended Description (Chapter 13)
  • Example 13-2 Extended Description (Chapter 13)
  • Example 13-3 Extended Description (Chapter 13)
  • Example 13-4 Extended Description (Chapter 13)
  • Fig. 13-25 Extended Description (Chapter 13)
  • Ladder Diagram with Two Rails Extended Description (Chapter 13)
  • Fig. 13-27 Extended Description (Chapter 13)
  • Fig. 13-28 Extended Description (Chapter 13)
  • Fig. 13-29 Extended Description (Chapter 13)
  • Fig. 13-30 Extended Description (Chapter 13)
  • Fig. 13-32 Extended Description (Chapter 13)
  • Fig. 13-34 Extended Description (Chapter 13)
  • Fig. 13-36 Extended Description (Chapter 13)
  • Fig. 13-37 Extended Description (Chapter 13)
  • Fig. 13-38 Extended Description (Chapter 13)
  • Fig. 13-39 Extended Description (Chapter 13)
  • Fig. 13-40 Extended Description (Chapter 13)
  • Fig. 13-42 Extended Description (Chapter 13)
  • Fig. 13-43 Extended Description (Chapter 13)
  • Fig. 13-44 Extended Description (Chapter 13)
  • Ladder Diagram Shows Extended Description (Chapter 13)
  • Fig. 14-1 Extended Description (Chapter 14)
  • Fig. 14-2 Extended Description (Chapter 14)
  • Fig. 14-3 Extended Description (Chapter 14)
  • Fig. 14-4 Extended Description (Chapter 14)
  • Fig. 14-5 Extended Description (Chapter 14)
  • Fig. 14-6 Extended Description (Chapter 14)
  • Fig. 14-7 Extended Description (Chapter 14)
  • Fig. 14-8 Extended Description (Chapter 14)
  • Fig. 14-9 Extended Description (Chapter 14)
  • Fig. 14-10 Extended Description (Chapter 14)
  • Fig. 14-11 Extended Description (Chapter 14)
  • Fig. 14-12 Extended Description (Chapter 14)
  • Fig. 14-13 Extended Description (Chapter 14)
  • Fig. 14-14 Extended Description (Chapter 14)
  • Fig. 14-15 Extended Description (Chapter 14)
  • Fig. 14-16 Extended Description (Chapter 14)
  • Fig. 14-17 Extended Description (Chapter 14)
  • Fig. 14-18 Extended Description (Chapter 14)
  • Fig. 14-19 Extended Description (Chapter 14)
  • Fig. 14-20 Extended Description (Chapter 14)
  • Fig. 14-21 Extended Description (Chapter 14)
  • Fig. 14-22 Extended Description (Chapter 14)
  • Fig. 14-23 Extended Description (Chapter 14)
  • Fig. A.2 Extended Description (Appendix A)
  • Fig. A.5 Extended Description (Appendix A)
  • Eight-to-one Data Selector Extended Description (Glossary)
  • A Block Diagram Showing Extended Description (Glossary)
  • Four Binary Addition Examples Showing Extended Description (Glossary)
  • Four Binary Subtraction Examples Extended Description (Glossary)
  • A Standard TTL Buffer Drives Extended Description (Glossary)
  • A Higher-voltage CMOS Input Extended Description (Glossary)
  • Complementary Metal Oxide Semiconductor Extended Description (Glossary)
  • A Boolean Expression is Shown Extended Description (Glossary)
  • A Logic Circuit Using an Inverter Extended Description (Glossary)
  • A Cutaway Diagram of a Liquid Extended Description (Glossary)
  • A Cutaway Diagram of a Display Tube Extended Description (Glossary)
  • A Voltage Waveform Crosses from Low Extended Description (Glossary)
  • A Cylindrical Stepper Motor Shows Extended Description (Glossary)
  • A Flow Shows Decimal Four Plus Three Extended Description (Glossary)
  • A 8421 Binary Coded Decimal Layout Extended Description (Glossary)
  • An 8421 Binary Coded Decimal Table Extended Description (Glossary)
  • A Labeled Breakdown of Part Number Extended Description (Glossary)
  • A Labeled Breakdown of Part Number Extended Description (Glossary)
  • A Block Diagram Shows a 60-hertz Extended Description (Glossary)
  • A Switch Connects to Five Volts and Ground Extended Description (Glossary)
  • Two Karnaugh Maps Labeled with A, B, C, D, and E Extended Description (Glossary)
  • A Four-input AND Gate Labeled Extended Description (Glossary)
  • A Four-input NAND Gate is Shown Equal Extended Description (Glossary)
  • A Four-input OR Gate Labeled A, B, C, and D Extended Description (Glossary)
  • A Free-running Multivibrator Powered Extended Description (Glossary)
  • A Full Subtractor Block Extended Description (Glossary)
  • A Table Lists Eight Three-bit Gray Extended Description (Glossary)
  • A Half Adder Block Receives Inputs Extended Description (Glossary)
  • A Half Subtractor Block Receives Inputs A and B Extended Description (Glossary)
  • A Logic-driven NPN Transistor Extended Description (Glossary)
  • A Four-variable Karnaugh Map Extended Description (Glossary)
  • A Four-variable Karnaugh Map with Four Extended Description (Glossary)
  • A Transistor-driven Relay Circuit Extended Description (Glossary)
  • A Transistor-driven Relay Circuit Extended Description (Glossary)
  • Two Stacked Karnaugh Maps with Columns Extended Description (Glossary)
  • A Fourteen-pin Integrated Circuit Extended Description (Glossary)
  • A Block Diagram Showing Inputs Extended Description (Glossary)
  • A Five-volt Source, a Switch Extended Description (Glossary)
  • A Circular Shaft Encoder Shows Concentric Extended Description (Glossary)
  • A Slotted Sensor Shows a Light-emitting Extended Description (Glossary)
  • Eight-bit Register Showing from Left Extended Description (Glossary)
  • Eight-bit Register from Left to Right Extended Description (Glossary)
  • From Left to Right, Decimal Seven Extended Description (Glossary)
  • From Left to Right, Fourteen-pin Extended Description (Glossary)
  • Title Reads Two Bit Gray Code Extended Description (Glossary)
  • From Left to Right, Capacitor Extended Description (Glossary)
  • A Vertical List of Data Inputs Zero to Seven Extended Description (Glossary)
  • Eight Register Cells Show Bits Extended Description (Glossary)
  • An Eight-cell Shift Register Showing Extended Description (Glossary)
  • A Serial Load Shift-left Register Extended Description (Glossary)
  • A CMOS Inverter Drives an LED Extended Description (Glossary)
  • A Table Lists TTL Types Extended Description (Glossary)
  • A Waveform Input Feeds Extended Description (Glossary)
  • A Pull-up Resistor from Plus Extended Description (Glossary)
  • A 3-input AND Gate A, B, and C Extended Description (Glossary)
  • A Logic Diagram Showing a Data Extended Description (Glossary)
  • A Circuit Showing an Input Buffer Extended Description (Glossary)
  • A Table with Columns Labeled A Extended Description (Glossary)
  • A Circuit with a TTL Buffer Extended Description (Glossary)
  • A Waveform Input and a Control Extended Description (Glossary)
  • A Gated S R Latch Made from Four NAND Extended Description (Glossary)